# Cascode Common Source Amplifier and Miller Effect

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## What is a Cascode Common Source Amplifier?

Cascode common source amplifier is a cascode amplifier with combination of a common source FET and a common gate FET. Cascode amplifier is a two-stage amplifier not only bound to FET. If we use a BJT, a cascode amplifier uses a common emitter BJT with a common base BJT.

In this case, we will use FETs, so we use a combination of a common source FET and a common gate FET.

A cascode amplifier has several advantages over a single amplifier, such as:

• Higher input and output impedances,
• Higher bandwidth,
• Higher input and output isolation.

This amplifier is able to reduce reverse transmission by improving the input and output isolation. This can be achieved because there is no direct coupling from output to input like what we found in a single transistor circuit. Furthermore, Miller Effect can be removed thus higher bandwidth is produced.

Take a look at a cascode amplifier below. From the circuit above, we have two MOSFET Q1 and Q2, where:

• Q1 is a common source FET
• Q2 is a common gate FET

For easier understanding, we can remove Q1 as a single common source FET. And Q2 as a single common gate FET. Why is the bottom FET Q1 not Q2? Because its operation starts from the bottom FET and its result is fed to the upper FET, Q2.

Combining those two we get a cascode amplifier using FETs. Where:

Vin = input voltage
Q1 = common source FET
Q2 = common gate FET
RD = drain resistance
VCC = supply voltage
Vout = output voltage

## Cascode Amplifier Circuit

A cascode amplifier consists of CS (Common Source) and CG (Common Gate) FETs. Whatever we get from CG will be transferred to the CS. Unlike the common single stage amplifier, this two stage amplifier has different characteristics such as: high bandwidth, high output and input impedances, high input-output isolation. 1. The input voltage (Vin) will be the bottom gate on common source FET (Q1).
2. The output of Q1 is the common gate FET (Q2).
3. The drain resistance of the output is represented by RD.
4. The output voltage can be drawn from the drain of the Q2 transistor.
5. The gate terminal of Q2 is grounded thus the source and drain voltage are almost steady.
6. The Q2 transistor has low input resistance and decreases the Q1 transistor’s gain thus Miller Effect is minimized and bandwidth is increased.
7. The low gain from Q1 transistor doesn’t affect the total gain on the Q2 transistor because the Q2 transistor replaces it.
8. The Q2 transistor will not be affected by the Miller effect because charging & discharging the capacitance from drain to source can be done using the drain resistor.
9. Isolation at output can be generated from the input.
10. The Q1 transistor has roughly stable voltage on its source and drain.
11. The Q2 transistor has nearly stable voltage on its source and drain.

No feedback response from output to input thus isolation is achieved by stable voltage connection between Q1 and Q2.

## How Does a Cascode Amplifier Work

Observe the circuit below to understand the cascode amplifier operation. The circuit above is a FET cascode amplifier so we will use the terms of Drain, Source, and Gate. The lower FET is the common source input stage amplifier driven by the input source, Vin. Bottom FET will drive the common gate amplifier (upper FET) as the output stage amplifier generating output signal, Vout.

When the lower FET conducts, it makes the upper FET conduct because of the changed potential between its gate and source.

From the short explanation above, we can conclude that the lower FET at its gate acts as the input and upper FET at its drain as the output.

The voltage at the upper FET’s source and lower FET’s drain is nearly constant during operation. This is achieved by grounding the upper FET’s gate.

The upper FET has low input resistance towards the lower FET so the voltage gain of the lower FET is very small. This very small gain reduces the Miller effect feedback capacitance from the drain to gate at the lower FET.

So, what is the point of using an amplifier that doesn’t produce amplification?

Don’t worry, the amplification of the upper FET will recover our voltage gain loss from the bottom FET. The lower FET operates with minimum Miller feedback and improves the bandwidth.

Since we electrically ground the upper FET’s gate, the charge and discharge of the stray capacitance (CDG) between gate and drain is simply flowing through the drain resistance (RD) and the output load resistance (Rout).

Its frequency response is only affected by the frequency above the RC time constant, given by Namely Its frequency will be quite high because CDG is small. This is why the upper FET will not suffer from the Miller effect of CDG.

If we only use the upper FET using its source as our input terminal, it will work as a common gate amplifier. This kind of amplifier will produce good voltage gain with wide bandwidth. Its drawback is its low input impedance thus limiting it to only be a low impedance voltage driver. Adding lower FET will provide high input impedance, thus can be driven by a high impedance source.

If the upper FET is replaced by inductive or resistive load and output is drawn from the lower FET’s drain, it means we make it as a common source FET. This configuration will provide equal input impedance as the cascode (high impedance), but still the cascode amplifier will provide greater gain and bandwidth.

## Miller Effect in a Cascode Amplifier

The total gain we get from a cascode amplifier is approximately equal to the common source amplifier (lower FET).

Why do we need a cascode if the gain is not significantly increased?

Our main objective from using a cascode amplifier is to eliminate Miller Effect.

The Miller Effect is the main factor of bandwidth limiter for the common amplifier circuits.

Take a look at the illustration of a Miller Effect below. Every transistor has capacitive parasitic between its three terminals:

• Capacitive parasitic Gate-Source, CGS (or CBE for base-emitter)
• Capacitive parasitic Source-Drain, CSD (or CCE for collector-emitter)
• Capacitive parasitic Drain-Gate, CDG (or CCB for collector-base)

Every of those three can steal current from the transistor thus affecting the bandwidth of the transistor.

The Miller Effect especially affects the CDG (Drain-Gate) or CCB (Collector-Base) capacitance.

From the circuit above we have a source voltage with a source impedance, RS as the Thevenin equivalent source.

Assume that there is a small change of voltage at the gate (increased), this will result in large voltage going down from drain to source.

Looking at the capacitance CDG:

1. The small voltage will go up but the large voltage will go down.
2. This results in current flowing through CDG, thus the capacitor’s gain is much larger than the transistor itself.
3. If the transistor’s gain is 10 then the capacitive may have 100.
4. CDG is magnified by our transistor’s gain.

Also the source impedance (RS) along with the capacitor (CDG) form a RC filter without us knowing. The transistor’s bandwidth is limited by the RC filter from the RS and amplified CDG.

The input capacitance due to CDG is expressed by This is where we deploy the Cascode Amplifier as shown below. Our first step is reducing the gain of the lower FET.

The gain for the common source amplifier is calculated from Where:
ACS = amplification of common source transistor
gm = transconductance of the transistor
RIN-CG = input resistance of the common gate transistor

Thus, Going up to the input capacitance calculation above, then The capacitance CDG is only amplified by 2 thus improving its bandwidth for CS.

The output of the lower FET is fed to the upper FET.

Since the upper FET is a common gate transistor, there is no signal on the gate terminal. By doing this, there will be no amplification of capacitance from the upper FET. The output will be drawn from the source of the upper FET.

From the combination of lower FET with reduced gain and grounded gate for the upper FET, the upper FET doesn’t suffer from the Miller Effect.

The gain of upper FET (AV-CG) is Remember, the gain of the lower FET (AV-CS) is unity (1).

Thus, the overall gain is Cascode amplifier is able to provide:

• High input impedance,
• High bandwidth,
• High slew rate,
• High gain, and
• High stability.

Cascode amplifiers can be considered only using a very low number of parts.

Cascode amplifier comes with few disadvantages such as:

• It requires high voltage supply.

### How to find bias voltages for cascode common source amplifiers?

Bias voltages derived from transistors under similar operating conditions to the transistors they supply.

### What is a cascode common source amplifier?

Cascode common source amplifier is a cascode amplifier with a combination of a common source FET and a common gate FET. A cascode amplifier can also be built BJT, a common emitter with a common base BJT.

### What is a cascode amplifier?

The cascode amplifier is a two-stage amplifier with a combination of common emitter transistor (or common source for FET) and a common base transistor (or common gate for FET). This amplifier provides higher input and output impedance, higher bandwidth, and better input-output isolation.

### What is a folded cascode amplifier?

Folded cascode is a single pole operational amplifier that has a large output swing and higher gain if compared to the common operational amplifier. This amplifier is suitable for high negative feedback because of its small signal gain that can be very large.

### What is the difference between a cascade and cascode amplifier?

From a transistor perspective, a cascade is typically when the amplifier load(s) are connected in a left-to right horizontal chain configuration, whereas a cascode has the load(s) stacked vertically